There are a number of integrated circuit memories commercially available. For example, dynamic memory circuits having memory cells arranged to be accessed in a random fashion are referred to as dynamic random access memories, DRAMs. These memories can be produced in a variety of designs which provide different methods of reading from and writing to the dynamic memory cells. One such method is page mode operations. Page mode operations in a DRAM are defined by the method of accessing a row of a memory cell array and randomly accessing different columns of the array. Data stored at the row and column intersection can be output while that column is accessed. An alternate type of memory access is the extended data output (EDO) memory which allows data stored at a memory array address to be available as output after the addressed column has been closed. A more detailed description of a DRAM having EDO features is provided in the "1995 DRAM Data Book" pages 1-1 to 1-30 available from Micron Technology, Inc. Boise, Id., the assignee of the present application and is incorporated herein by reference. Yet another type of operation is included in a burst EDO memory which adds the ability to address one column of a memory array and then automatically address additional columns in a pre-determined manner without providing the additional column addresses on external address lines.
In a burst memory, external inputs can be used to terminate a burst access operation. Timing and pulse width requirements are traditionally placed on signals provided on these external inputs. If the minimum timing or pulse width requirements placed on the external inputs are excessive, an error can occur when a short pulse width signal is provided on the input and a burst operation will not be terminated. For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a circuit which can monitor external inputs by reducing critical timing and substantially independent of signal pulse width.